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Etched sidewall morphology inspection is a critical quality control and process characterization technique used in semiconductor, MEMS, and microfabrication manufacturing to evaluate the geometric profile, roughness, and defects of etched structures. By combining cross-sectional imaging and surface metrology, this inspection verifies that etch processes deliver the required sidewall angle, verticality, and dimensional accuracy. This article explains the technical principles, sample types, measurable parameters, testing methods, and typical applications of etched sidewall morphology inspection.

Technical Overview

Etching is one of the fundamental pattern transfer steps in micro- and nanofabrication, encompassing wet chemical etching as well as dry plasma techniques such as reactive ion etching (RIE), deep reactive ion etching (DRIE), and inductively coupled plasma (ICP) etching. The physical shape of the sidewall left behind after etching directly governs device electrical performance, mechanical reliability, optical behavior, and subsequent process steps such as deposition and conformal coating. Etched sidewall morphology inspection refers to the systematic examination and measurement of these vertical or sloped surfaces in trenches, vias, mesas, channels, and other etched features.

Typical morphological characteristics of interest include the sidewall angle or taper, verticality, surface roughness, scalloping produced by time-multiplexed Bosch DRIE processes, bowing, notching, footing, microtrenching, polymer residue, and lateral dimensional offsets at the top and bottom of the feature. Inspection is generally performed by accredited third-party laboratories or in-house analytical facilities using cross-sectional scanning electron microscopy (SEM), critical dimension SEM (CD-SEM), atomic force microscopy (AFM), focused ion beam (FIB) sectioning, and optical profilometry. Quantitative image analysis is conducted with magnification calibrated in accordance with ISO 16700 guidelines for scanning electron microscopy, and laboratory quality management is commonly aligned with ISO/IEC 17025 requirements.

Testing Samples

Silicon Wafers and MEMS Structures

Monocrystalline and polycrystalline silicon wafers containing etched trenches, through-silicon vias (TSVs), comb-drive actuators, accelerometers, resonators, and deep etched cavities are among the most common samples. These structures, typically produced by DRIE, require careful evaluation of sidewall verticality, scallop depth, and roughness because silicon sidewall quality strongly influences mechanical Q-factor, fatigue life, and sidewall capacitance.

Semiconductor Device Wafers

Front-end device wafers, including shallow trench isolation (STI), gate stack etches, contact and via holes, and high aspect ratio capacitor structures in DRAM or 3D NAND devices, are inspected to confirm critical dimension (CD) uniformity, profile fidelity, and the absence of twisting, bowing, or striations along deep features.

Compound Semiconductors and Optical Materials

GaAs, GaN, SiC, InP, quartz, sapphire, and glass substrates with etched laser facets, ridge waveguides, grating structures, or microfluidic channels are examined. In optical and photonic applications, sidewall roughness on the scale of nanometers can cause scattering losses, making sub-nanometer resolution metrology essential.

Metals, Thin Films, and Patterned Resist

Etched aluminum, copper, titanium, and molybdenum interconnects, thin film stacks, and hard mask layers, as well as patterned photoresist before and after plasma exposure, are inspected to assess undercut, residue, redeposition, and resist sidewall integrity that affects the final transferred profile.

Testing Items

Etched sidewall morphology inspection covers a defined set of quantitative and qualitative parameters. Core measurable items include:

  • Sidewall angle and taper: the deviation of the etched wall from vertical, typically reported in degrees, with tolerances that may range from plus or minus 0.5 degrees for advanced logic to several degrees for MEMS.
  • Critical dimension (CD) and CD uniformity: top width, middle width, and bottom width of trenches or vias, together with CD bias relative to the mask.
  • Etch depth and aspect ratio: vertical depth measured from the original surface, and the ratio of depth to opening width.
  • Sidewall roughness: arithmetic average roughness (Ra) and root mean square roughness (Rq), as well as line edge roughness (LER) and line width roughness (LWR) for lithographic features.
  • Scalloping: peak-to-valley ripple depth and periodicity generated by the passivation and etch steps of Bosch DRIE processes.
  • Profile defects: bowing, necking, notching at insulator interfaces, footing, undercut, microtrenching, feature twisting, and sidewall striations.
  • Surface contamination: fluorocarbon polymer residue, silicon oxide regrowth, micromasking artifacts, and redeposited by-products.
  • Mask condition: remaining mask thickness, mask erosion, and mask sidewall profile correlation to the etched feature.

Testing Methods

Cross-Sectional Scanning Electron Microscopy (SEM)

Cross-sectional SEM is the primary technique for sidewall morphology inspection. Samples are cleaved or precision-polished through the feature of interest, coated with a conductive layer if charging is expected, and imaged at accelerating voltages typically between 1 kV and 15 kV. Two-dimensional profiles are extracted from micrographs, allowing direct measurement of sidewall angle, depth, CD at multiple heights, and visual identification of scalloping and bowing. Magnification calibration follows ISO 16700, and terminology is consistent with ISO 22493 for scanning electron microscopy.

Focused Ion Beam (FIB) Cross-Sectioning

Where cleavage planes cannot be controlled precisely, or where site-specific analysis of an individual failing via or trench is required, FIB milling produces localized cross sections with minimal mechanical damage. FIB-SEM dual-beam systems enable sequential sectioning and imaging, effectively reconstructing the three-dimensional shape of an etched feature and revealing internal twisting or voids that a single cross section cannot show.

Critical Dimension SEM (CD-SEM)

CD-SEM uses low-voltage, high-resolution top-down imaging with automated pattern recognition to measure line width, LER, and LWR across full wafers. Although top-down CD-SEM does not directly capture the sidewall angle, it provides statistically robust uniformity maps and detects subtle profile changes through line width signatures at different image conditions.

Atomic Force Microscopy (AFM)

AFM provides the highest vertical resolution for sidewall roughness measurement. Specialized techniques, including angle-evaporated replication, sidewall direct scanning with flared or boot-shaped tips, and cleaved-sample measurement, quantify Ra and Rq at sub-nanometer resolution, which is indispensable for photonic waveguides and RF MEMS where optical and electrical losses are roughness-sensitive.

Optical and Stylus Profilometry

White-light interferometry and confocal optical profilometry rapidly measure etch depth, large-scale surface topography, and gross profile anomalies over wide fields. Stylus profilometry, applied with light forces to avoid feature damage, offers a quick screening measurement of step height and overall trench geometry. Cross-section reconstruction from tilt-series optical data can also estimate sidewall angles on features larger than a few micrometers.

Transmission Electron Microscopy (TEM)

For advanced nodes, TEM examination of lamella prepared by FIB reveals nanometer-scale sidewall damage layers, amorphization, lattice defects, and interfacial residues, providing the ultimate resolution when plasma-induced damage mechanisms must be understood.

Applications

Etched sidewall morphology inspection supports process development, production qualification, and failure analysis across multiple industries. Representative applications include:

  • MEMS development and production: qualifying DRIE recipes for accelerometers, gyroscopes, microphones, inkjet nozzles, and microneedles, and controlling scallop depth for mechanical and fluidic performance.
  • Advanced semiconductor manufacturing: profile control for STI, gate, fin, and self-aligned vias, where sidewall shape directly affects parasitic capacitance, leakage, and overlay-dependent yields.
  • 3D integration and packaging: inspection of through-silicon vias and redistribution trenches used in wafer-level packaging and heterogeneous integration.
  • Power devices: verification of deep trench profiles in trench MOSFETs and IGBTs, where sidewall rounding and bottom corner shape influence breakdown voltage and gate oxide integrity.
  • Photonics and optics: sidewall roughness qualification of silicon and III-V waveguides, gratings, and vertical-cavity surface-emitting laser (VCSEL) mesas to minimize scattering loss.
  • Microfluidics and biomedical devices: channel profile, sidewall quality, and residue verification in glass, polymer, and silicon lab-on-chip structures.
  • Etch process transfer and equipment qualification: comparing chamber-to-chamber matching, analyzing endpoint and gas chemistry changes, and supporting root cause analysis after yield excursions.

FAQ

Why is etched sidewall morphology important?

The sidewall shape determines how well the etched feature performs its intended function. Non-vertical walls change capacitance and transistor characteristics in semiconductors, increase scattering loss in photonics, reduce mechanical strength and fatigue life in MEMS, and can prevent conformal deposition in subsequent steps. Detecting morphology deviations early prevents costly downstream yield loss.

What is the typical specification for sidewall verticality?

Specifications depend on the application. Advanced semiconductor features often require sidewall angles within one degree of vertical, MEMS DRIE structures commonly specify plus or minus 1 to 2 degrees, and microfluidic or packaging features may tolerate several degrees of taper. Reported values should always include measurement uncertainty.

How is scalloping measured?

Scalloping from Bosch-process DRIE is measured from high-magnification cross-sectional SEM images by extracting the peak-to-valley ripple depth and the spatial period along the sidewall. Typical controlled values range from tens of nanometers down to below 10 nanometers for optimized processes.

Why use AFM in addition to SEM?

SEM provides excellent lateral resolution and clear profile visualization, but sidewall roughness quantification below roughly one nanometer is limited by beam interaction volume and charging. AFM delivers true three-dimensional topography with sub-nanometer vertical resolution, making it the reference method for roughness-sensitive optical and electrical applications.

How should samples be prepared for inspection?

Samples should be cleaned to remove post-etch residues only where residue inspection is not the goal, protected against further oxidation, and shipped in clean, inert packaging. Cross sections must be accurately oriented through the feature of interest; accredited third-party laboratories typically coordinate target feature coordinates with customers before sectioning to ensure the correct location is analyzed.

What deliverables are provided after inspection?

Standard deliverables include calibrated SEM or AFM images at multiple magnifications, annotated dimensional measurements such as sidewall angle, depth, and CD, quantitative roughness or scallop data, a description of observed defects, and an engineering report interpreting the results relative to process requirements and applicable ISO or ASTM measurement guidelines.